# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/cvitek,cv180x-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cvitek CV180X SoC Clock Controller

maintainers:
  - Fisher Cheng <fisher.cheng@cvitek.com>

description: |
  The Cvitek CV180X SoC clock controller generates and supplies clock to
  various peripherals within the SoC.

  This binding uses common clock bindings
  [1] Documentation/devicetree/bindings/clock/clock-bindings.txt

properties:
  compatible:
    const: cvitek,cv180x-clk

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  '#clock-cells':
    const: 1

required:
  - compatible
  - reg
  - clocks
  - '#clock-cells'

additionalProperties: false

examples:
  # Clock controller node:
  - |
    clk: clock-controller {
      compatible = "cvitek,cv180x-clk";
      reg = <0x0 0x03002000 0x0 0x1000>;
      clocks = <&osc>;
      #clock-cells = <1>;
    };

  # Example PWM controller node that consumes clock generated by the clock controller:
  - |
    pwm0: pwm@3060000 {
      compatible = "cvitek,cvi-pwm";
      reg = <0x0 0x3060000 0x0 0x1000>;
      clocks = <&clk CV180X_CLK_PWM>;
      #pwm-cells = <1>;
    };

...
